[tor-commits] [tor/master] Bug 24769: Reduce and parameterize the cbt learning idle timeout.

nickm at torproject.org nickm at torproject.org
Wed Feb 14 15:09:26 UTC 2018


commit 148c2410af4dd084009a5625d0687987dc85dc42
Author: Mike Perry <mikeperry-git at torproject.org>
Date:   Wed Jan 31 16:27:50 2018 +0000

    Bug 24769: Reduce and parameterize the cbt learning idle timeout.
    
    This is only half of the changes needed. We should also parameterize the
    number of concurrent cbt learning circuits in needs_circuits_for_build().
---
 changes/bug24769     |  7 +++++++
 src/or/circuitlist.c | 18 ++++++++++++++----
 2 files changed, 21 insertions(+), 4 deletions(-)

diff --git a/changes/bug24769 b/changes/bug24769
new file mode 100644
index 000000000..5aee8daa2
--- /dev/null
+++ b/changes/bug24769
@@ -0,0 +1,7 @@
+  o Minor bugfixes (performance):
+    - Reduce the number of circuits that can be opened at once during the
+      circuit build timeout phase. This is done by increasing the idle timeout
+      to 3 minutes, and lowering the maximum number of concurrent learning
+      circuits to 10. Fixes Bug 24769; bugfix on 0.3.1.1-alpha.
+
+
diff --git a/src/or/circuitlist.c b/src/or/circuitlist.c
index 8c02cd1c1..06e955a8f 100644
--- a/src/or/circuitlist.c
+++ b/src/or/circuitlist.c
@@ -897,8 +897,10 @@ init_circuit_base(circuit_t *circ)
 
 /** If we haven't yet decided on a good timeout value for circuit
  * building, we close idle circuits aggressively so we can get more
- * data points. */
-#define IDLE_TIMEOUT_WHILE_LEARNING (1*60)
+ * data points. These are the default, min, and max consensus values */
+#define DFLT_IDLE_TIMEOUT_WHILE_LEARNING (3*60)
+#define MIN_IDLE_TIMEOUT_WHILE_LEARNING (10)
+#define MAX_IDLE_TIMEOUT_WHILE_LEARNING (1000*60)
 
 /** Allocate space for a new circuit, initializing with <b>p_circ_id</b>
  * and <b>p_conn</b>. Add it to the global circuit list.
@@ -931,7 +933,11 @@ origin_circuit_new(void)
       circuit_build_times_needs_circuits(get_circuit_build_times())) {
     /* Circuits should be shorter lived if we need more of them
      * for learning a good build timeout */
-    circ->circuit_idle_timeout = IDLE_TIMEOUT_WHILE_LEARNING;
+    circ->circuit_idle_timeout =
+      networkstatus_get_param(NULL, "cbtlearntimeout",
+                              DFLT_IDLE_TIMEOUT_WHILE_LEARNING,
+                              MIN_IDLE_TIMEOUT_WHILE_LEARNING,
+                              MAX_IDLE_TIMEOUT_WHILE_LEARNING);
   } else {
     // This should always be larger than the current port prediction time
     // remaining, or else we'll end up with the case where a circuit times out
@@ -951,7 +957,11 @@ origin_circuit_new(void)
                "%d seconds of predictive building remaining.",
                circ->circuit_idle_timeout,
                prediction_time_remaining);
-      circ->circuit_idle_timeout = IDLE_TIMEOUT_WHILE_LEARNING;
+      circ->circuit_idle_timeout =
+          networkstatus_get_param(NULL, "cbtlearntimeout",
+                  DFLT_IDLE_TIMEOUT_WHILE_LEARNING,
+                  MIN_IDLE_TIMEOUT_WHILE_LEARNING,
+                  MAX_IDLE_TIMEOUT_WHILE_LEARNING);
     }
 
     log_info(LD_CIRC,





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